Konami SCC
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The Konami SCC (Sound Custom Chip or Sound Creative Chip) is a sound chip developed by Konami with Yamaha for the MSX. Konami was dissatisfied with the capabilities of the PSG, the MSX and MSX2 built-in sound-chip. The SCC is used together with the PSG and is also known as the K051649.
Each Konami cartridge that uses the SCC had one on-board. It also had a memory mapper builtin, so the cartridges only needed this chip and the actual ROM. Nearly all of the later MSX titles (from 1987 onwards) used this chip, including Gradius 2, Metal Gear 2. The chip was also used in several Arcade games: Haunted Castle, City Bomber, Hexion, Nyan Nyan Panic and is emulated by MAME.
A slightly improved version called the Sound Cartridge is used for Snatcher and SD Snatcher, which has 64kB of RAM on-board.
On each SCC the following is printed: KONAMI 051649 2212P003 JAPAN, followed by a fabrication location/date number, like 8750AAA. The first two digits are the year, followed by the week. The letters after that are some location/lot code.
The SCC is a primitive wavetable sound chip. There are five channels. Each channel can be controlled by an on/off bit, volume, frequency and 32 bytes wave. Channel 4 and 5 share the 32 bytes wave, so there is 128 bytes memory built-in.
[edit] Programming the SCC
What follows here is a technical description of how the chip works. It was never documented so all of this is reverse-engineered.
The SCC is accessed through memory mapped I/O. First 3Fh (the two high bits are unimportant, so FFh is fine too) must be written to somewhere between 9000h and 97FFh. Now the SCC is active (you can read and write) at 9800h to 9FFFh.
| Address | read/write | Function |
|---|---|---|
| 9800h - 981Fh | rw | waveform channel 1 |
| 9820h - 983Fh | rw | waveform channel 2 |
| 9840h - 985Fh | rw | waveform channel 3 |
| 9860h - 987Fh | rw | waveform channel 4 and 5 |
| 9880h - 9881h | w | frequency channel 1 |
| 9882h - 9883h | w | frequency channel 2 |
| 9884h - 9885h | w | frequency channel 3 |
| 9886h - 9887h | w | frequency channel 4 |
| 9888h - 9889h | w | frequency channel 5 |
| 988Ah | w | volume channel 1 |
| 988Bh | w | volume channel 2 |
| 988Ch | w | volume channel 3 |
| 988Dh | w | volume channel 4 |
| 988Eh | w | volume channel 5 |
| 988Fh | w | on/off switch channel 1 to 5 |
| 9890h - 989Fh | same as 9880h to 988Fh | |
| 98A0h - 98DFh | no function | |
| 98E0h - 98FFh | rw | deformation register |
The waveform is made up of 32, signed (two's complement) bytes. The waveform represents the actual form of the tone the sound chip produces. It's played back from byte 0 to 31 and then again from the start.
The frequency is stored the same way as in the PSG. It is a 12 bits value. The first byte contains bits 0 to 7 from the frequency and bits 0 to 3 of the second byte contain bits 8 to 11 of the frequency. Bits 4 to 7 of the second byte are ignored. Remember that the value you enter is really a period: a higher value gives a lower frequency.
The formula for calculating the frequency of the tone is the same as with the PSG:
fclock is the clock of the computer (always 3,579,545Hz on an MSX) and P is the 12 bits period set in the frequency register.
The volume is stored in the same way as in the PSG, though it does not support envelopes. Bits 0 to 3 contain a volume of 0 to 15, and bits 7 to 4 are ignored. A volume of 0 is silent, and a volume of 15 is maximum volume.
The on/off switch register switches the different channels on or off. Set bit 0 to activate channel 1, bit 1 for channel 2, and so on to bit 4 for channel 5. Bits 5 through 7 are ignored.
[edit] Deformation Register (98E0h)
This register is not used by any Konami game. All the addresses in the memory area (98E0h - 98FFh) refer to the same register. Resetting the SCC will set this register to 0.
The lower two bits influence the frequency. If set to 01b, all frequencies are multiplied by 256. If set to 11b or 10b, all frequencies are multiplied by 16.
If bit 5 is set, waveform playback is started from the beginning when a frequency register is written to.
If bit 6 is set, all waveform data start rotating with following speed:
Also it is no longer possible to write to the waveform data.
If bit 7 and 6 are set, waveform data only happens in channel 4 and 5.
Reading from this register will return FFh, but will set bit 6 of the register. Since the waves start to rotate now, the values in 9800h through 987Fh will change each time you read them.
[edit] More on memory
The memory area from 9800h to 987Fh behaves as RAM as long as the deformation register is reset. The memory area from 9880h to 98FFh is write only; if you read it, it'll always return FFh. Watch out for reading from the deformation register, as this will set bit 6.
The memory area from 9900h to 99FFh has exactly the same function as from 9800h to 98FFh, 9900h through 99FFh and so on to 9F00h through 9FFFh. This happens because the SCC chip is not connected to address lines A8 thotugh A10, so it cannot distinguish these ranges.
